Chapter 1

Fault Modeling and Simulation

Manufacturing defects, faults, and errors

medium • 1 min read

Stuck-at fault model (SAF), bridging faults, transition faults

medium • 2 min read

Fault equivalence and fault collapsing

medium • 3 min read

Fault simulation algorithms (Serial, Parallel, Deductive)

medium • 4 min read

Test volume and fault coverage metrics

medium • 5 min read

Chapter 2

Test Generation Techniques

Automatic Test Pattern Generation (ATPG) concepts

medium • 1 min read

D-Algorithm, PODEM, and FAN algorithms

medium • 2 min read

Boolean difference method

medium • 3 min read

Test generation for sequential circuits

medium • 4 min read

Time-frame expansion method

medium • 5 min read

Chapter 3

Design for Testability (DFT)

Ad-hoc testability layout rules

medium • 1 min read

Scan-based design methodology

medium • 2 min read

Scan testing, overheads, and trade-offs

medium • 3 min read

Partial scan and full scan implementations

medium • 4 min read

Boundary Scan standard (IEEE 1149.1)

medium • 5 min read

Chapter 4

Built-In Self-Test (BIST)

BIST architectures and pseudo-random pattern generators

medium • 1 min read

Linear Feedback Shift Registers (LFSR)

medium • 2 min read

Signature analysis and Multiple Input Signature Registers (MISR)

medium • 3 min read

Logic BIST vs Memory BIST (MBIST)

medium • 4 min read

BIST for mixed-signal systems

medium • 5 min read

Chapter 5

Delay Testing and Fault Tolerance

Path delay and transition delay fault models

medium • 1 min read

Delay test methodologies (Launch-on-shift, Launch-on-capture)

medium • 2 min read

IDDQ testing principles and execution

medium • 3 min read

Hardware redundancy and fault-tolerant architectures

medium • 4 min read

Triple Modular Redundancy (TMR)

medium • 5 min read