Chapter 1

SRAM Architecture and Design

6T SRAM cell operations (Read/Write/Hold)

medium • 1 min read

Static Noise Margin (SNM) theory and simulation

medium • 2 min read

Peripheral circuits (address decoders, sense amplifiers)

medium • 3 min read

8T and 10T SRAM cells for low VDD

medium • 4 min read

SRAM array leakage reduction techniques

medium • 5 min read

Chapter 2

DRAM Technologies

1T-1C DRAM cell structure and operation

medium • 1 min read

Refresh mechanisms and retention time

medium • 2 min read

DRAM architecture (Banks, rows, columns)

medium • 3 min read

SDRAM, DDR, DDR2, DDR3, and DDR4 interfaces

medium • 4 min read

Power management in DRAM arrays

medium • 5 min read

Chapter 3

Non-Volatile Memories

Floating-gate transistor physics

medium • 1 min read

Flash memory (NAND vs NOR architectures)

medium • 2 min read

Erase, Program, Read operations in Flash

medium • 3 min read

Phase-Change Memory (PCM) and MRAM

medium • 4 min read

Resistive RAM (RRAM) operation principles

medium • 5 min read

Chapter 4

Memory Testing and Fault Models

Memory fault models (Stuck-at, Coupling, Pattern-sensitive)

medium • 1 min read

Memory March test algorithms (March C, March C-)

medium • 2 min read

Memory BIST architecture implementation

medium • 3 min read

Address decoder faults testing

medium • 4 min read

Test time reduction techniques

medium • 5 min read

Chapter 5

Memory Reliability and Packaging

Soft errors, radiation effects in memory devices

medium • 1 min read

Error Correction Codes (ECC: Hamming codes, SEC-DED)

medium • 2 min read

Built-In Self-Repair (BISR) using redundant columns/rows

medium • 3 min read

High Bandwidth Memory (HBM) basics

medium • 4 min read

2.5D and 3D memory die stacking (TSVs)

medium • 5 min read