Chapter 1

Introduction to DSP Systems

Typical DSP algorithms (FIR, IIR, FFT)

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Representation of DSP algorithms (Signal flow graphs)

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Iteration bound and data flow graph

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Loop bound and critical path assessment

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Performance metrics (Throughput and Latency)

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Chapter 2

Pipelining and Parallel Processing

Pipeline interleaving in digital filters

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Parallel processing for low power design

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Combining pipelining and parallel processing

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Retiming for clock period minimization

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Retiming techniques for IIR filters

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Chapter 3

Unfolding and Folding Concepts

Unfolding algorithm and applications

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Properties of unfolded architectures

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Folding transformation and folding sets

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Register minimization techniques

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Forward-backward register allocation algorithms

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Chapter 4

Fast Convolution and Systolic Architectures

Cook-Toom and Winograd algorithms

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Iterated convolution techniques

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Design of Systolic arrays

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FIR systolic arrays mapping

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Matrix multiplication systolic structures

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Chapter 5

Arithmetic Architectures for DSP

Bit-serial and digit-serial arithmetic

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Distributed arithmetic in DSP

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Carry save adders and multipliers mapping

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Redundant number representations

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Numerical strength reduction techniques

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