Chapter 1
Fundamentals of Computer Design
Chapter 2
Instruction-Level Parallelism
Dynamic scheduling and Tomasulo's algorithm
medium • 1 min read
Hardware-based speculation and branch prediction
medium • 2 min read
Multiple issue and superscalar processors
medium • 3 min read
VLIW architecture and software pipelining
medium • 4 min read
Limits of Instruction-Level Parallelism
medium • 5 min read
Chapter 3
Memory Hierarchy Design
Symmetric and distributed shared memory architectures
medium • 1 min read
Synchronization mechanisms in multiprocessors
medium • 2 min read
Models of memory consistency
medium • 3 min read
Simultaneous Multithreading (SMT)
medium • 4 min read
Multi-core processors and chip multiprocessors
medium • 5 min read
Chapter 5
Data-Level Parallelism
Vector architecture and SIMD instruction sets
medium • 1 min read
Graphics Processing Units (GPUs) architecture
medium • 2 min read
CUDA programming model overview
medium • 3 min read
Systolic arrays and domain-specific architectures
medium • 4 min read
Interconnection networks and routing topologies
medium • 5 min read